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Dynamic random access memory circuit having a testing system and method to determine the sensitivity of a sense amplifier
Dynamic random access memory circuit having a testing system and method to determine the sensitivity of a sense amplifier
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机译:具有确定灵敏放大器灵敏度的测试系统和方法的动态随机存取存储器电路
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摘要
A dynamic random access memory (DRAM) utilizes a testing system to independently control a voltage differential appearing between a pair of bit lines and sensed by the sense amplifier. The sensitivity of the sense amplifier is determined by monitoring an input/output signal in response to sensing the known voltage differential. The magnitude of the voltage differential appearing between the bit lines is controlled by enabling a first dummy cell to transfer a first reference charge onto a first bit line and by enabling a second dummy cell to transfer a second reference charge onto a second bit line.
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