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EXECUTION UNIT ARCHITECTECTURE TO SUPPORT x86 INSTRUCTION SET AND x86 SEGMENTED ADDRESSING
EXECUTION UNIT ARCHITECTECTURE TO SUPPORT x86 INSTRUCTION SET AND x86 SEGMENTED ADDRESSING
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机译:执行单元体系结构支持x86指令集和x86分段寻址
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摘要
A microprocessor execution unit includes an arithmetic unit and an addressing unit. The arithmetic unit performs arithmetic and logical operations on operands. The addressing unit operates in conjunction with the arithmetic unit to calculate offsets, limits, and linear addresses in a single cycle.
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