APPARATUS FOR MULTIPLEXING AND DEMULTIPLEXING ATM(ASYNCHRONOUS TRANSFER MODE) CELLS

摘要

PURPOSE: An apparatus for multiplexing and demultiplexing ATM(Asynchronous Transfer Mode) cells is provided to implement a hardware to generate the ATM cells according to an ATM switch cell structure, to transmit the ATM cells, and to disassemble message-unit data into cell units to assemble cell-unit data into message units, so as to reliably exchange many information in a shortest time. CONSTITUTION: Serial/parallel(S/P) converters(411-41N) convert serial cell data into parallel cell data. Transmission controllers(421-42N) store converted parallel cells in transmission FIFOs(First-In-First-Outs)(431-43N), and supply a cell storage completion signal indicating one cell storage completion. A local processor(441) generates ATM(Asynchronous Transfer Mode) cells to store the ATM cells in an FIFO(43(N+1)), and supplies the cell storage completion signal. A transmission FIFO controller(442) selectively transmits the parallel cells according to an FIFO selection signal, and supplies a cell transmission completion signal indicating a cell transmission completion. A cell counter(443) counts the number of cells transmitted to the transmission FIFOs(431-43N) from the transmission controllers(421-42N), and counts the number of cells transmitted to the transmission FIFO(43(N+1)) from the local processor(441), according to the cell storage completion signals. The cell counter(443) counts the number of cells transmitted from the transmission FIFOs(431-43N) through the transmission FIFO controller(442) according to the cell transmission completion signal, and outputs a FIFO request signal. An FIFO selection controller(444) inputs the FIFO request signal to output an FIFO selection signal for transmitting cells stored in one transmission FIFO of the transmission FIFOs(431-43N). A cell rearranger(445) rearranges the ATM cells stored in the transmission FIFOs(431-43N). A cell selector(446) selectively transmits the cells transmitted from the transmission FIFO controller(442) and the rearranged ATM cells to a cell interface(447), according to the FIFO selection signal.