PROCESSOR CONFIGURED TO MAP LOGICAL REGISTER NUMBERS TO PHYSICAL REGISTER NUMBERS USING VIRTUAL REGISTER NUMBERS

摘要

A processor employing a corresponding unit containing register name reset hardware is shown. The corresponding unit may assign virtual register numbers to the source registers through retrieval of instruction operations to detect internal line dependencies. Subsequently, the physical register numbers correspond to the source register numbers in response to the virtual register numbers. The corresponding unit may store the current predicted state corresponding to each line of command operations processed in the corresponding unit (e.g., corresponding storage unit). Additionally, the corresponding unit stores an indication that command operations in the line update the logical register, wherein the logical registers are updated, and the physical register numbers are assigned to the command operations. Upon detection of an exception condition for a command operation on one line, the current predicted state corresponding to the line is restored in the corresponding storage unit. Additionally, the physical register numbers corresponding to the intra-line instruction operations are restored to the current predicted state prior to the instruction operation encountering the exception. The corresponding unit may use the same physical register to store both the condition code result and the integer result. The physical register number identifying the physical register is stored for both the condition code result and the integer result. The corresponding unit retrieves previous name resets from the structured name reset block as it withdraws one or more command operations. The extracted physical register numbers are cammed for the updated structural state. If a cam match is detected, the physical register taken out is not freely used.