SYSTEM FOR DIVIDING PROCESSING TASKS INTO SIGNAL PROCESSOR AND DECISION-MAKING MICROPROCESSOR INTERFACING

摘要

An architecture and method are provided for efficiently dividing a processing task into tasks for a programmable real-time signal processor (SPROC) 10 and tasks for a decision microprocessor 2120. The SPROC is provided with a non-interrupted structure where data flows through a multiported central memory. This SPROC is programmed in an environment that requires only graphical entries on the block diagram of the user design. In realizing the block diagram automatically in silicon, this SPROC programming / development environment provides for software connections and interfaces with the host microprocessor 2120. This programming environment includes a high level computer screen entry system that allows selection, entry, parameterization and access of a plurality of functional blocks; A functional block cell library 2015 that provides source code representing these functional blocks; And compiling the program using the information and function block cell library 2015 entered into the high-level entry system and outputting a symbol table providing source data code for data memory of SPROC, source program code for program memory, and memory map. And a signal processor scheduler / compiler 2040, which maps SPROC addresses to variable names that the microprocessor 2120 quotes in compiling the program separately.