High-speed data bus and interface circuit for uncompressed high definition video disc recorders

摘要

The present invention relates to an uncompressed high definition television (HDTV) class video disk recorder (VDR). In particular, each of the disk boards 1-4 included in the existing video disk recorder has four pixel disk boards (1A-1D). (2A-2D) (3A-3D) (4A-4D), each pixel disk board and video interface board 5 decodes two pixel disk board selection signals input through the data bus, The enable terminal of the buffer 8 when the output of the 2 X 4 decoder 6 at the same position as the position of the switch which is currently turned on is passed through the switching unit 7 in which the order AD of the pixel disk board is set. Turn on to allow the current pixel disk board to accept pixel values on the current data bus. Therefore, although the speed of each pixel disk board is slow, the whole system is stable and can store and play uncompressed HDTV-class images in real time.