首页> 外国专利> ARCHITECTURE OF AN EXECUTIVE UNIT IN SUPPORT OF THE X86 RECOMMENDATION PROCEDURE AND THE SEGMENTED X86 ADDRESSMENT

ARCHITECTURE OF AN EXECUTIVE UNIT IN SUPPORT OF THE X86 RECOMMENDATION PROCEDURE AND THE SEGMENTED X86 ADDRESSMENT

机译:支持X86推荐程序和分段X86地址的执行单元的体系结构

摘要

A microprocessor execution unit includes an arithmetic unit and an addressing unit. The arithmetic unit performs arithmetic and logical operations on operands. The addressing unit operates in conjunction with the arithmetic unit to calculate offsets, limits, and linear addresses in a single cycle.
机译:微处理器执行单元包括算术单元和寻址单元。算术单元对操作数执行算术和逻辑运算。寻址单元与算术单元一起运行,以在单个周期内计算偏移量,极限和线性地址。

著录项

  • 公开/公告号DE69615313D1

    专利类型

  • 公开/公告日2001-10-25

    原文格式PDF

  • 申请/专利权人 NATIONAL SEMICONDUCTER CORP. SANTA CLARA;

    申请/专利号DE19966015313T

  • 发明设计人 THOMSON W.;TAM J.;

    申请日1996-05-23

  • 分类号G06F9/355;G06F7/48;

  • 国家 DE

  • 入库时间 2022-08-22 01:08:17

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