Damascene interconnection level production, especially for ICs using copper conductors, comprises low temperature plasma stripping and removal of a plasma etch-resist without affecting an underlying organic dielectric layer

摘要

Damascene interconnection level production, by low temperature plasma stripping and removal of a plasma etch-resist (4) without affecting an underlying organic dielectric layer (2), is new. A damascene-type interconnection level is produced on a semiconductor device (1) by (a) depositing a first layer (2) of a low dielectric constant organic material; (b) depositing a second layer (3) of mineral material; (c) depositing a third layer (4) of an organic etch-resist material; (d) forming an interconnection pattern in the third layer (4); (e) plasma etching the third layer (3) according to the pattern until the first layer (2) is exposed; (f) subjecting the resist to downstream low temperature plasma stripping to embrittle the crust formed on the resist surface during plasma etching; (g) removing the resist with a solution which dissolves the resist without affecting the electrical characteristics of the first layer (2); and (h) producing the interconnections.