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Minimal frame buffer manager allowing simultaneous read/write access by alternately filling and emptying a first and second buffer one packet at a time

机译:最小的帧缓冲区管理器,通过一次交替填充和清空第一和第二缓冲区一个数据包,允许同时进行读/写访问

摘要

Methods and arrangements are provided for a block decoder in the form of a single integrated circuit (IC) for use in a variety of data storage devices. The block decoder is configured to transfer streaming data from the storage medium to an external device, such as a host computer's processor, without introducing any significant overhead induced latency into the data transfer. This is accomplished by employing a purely hardware-based logic and substantially minimizing the amount of buffering of data that is required within the storage device. The resulting block decoder can be integrated into a single IC because the amount of buffering memory that is required can be economically fabricated using conventional logic fabrication processes, such as complementary metal oxide semiconductor (CMOS) processes.
机译:以单个集成电路(IC)的形式为块解码器提供了用于各种数据存储设备的方法和布置。块解码器配置为将流数据从存储介质传输到外部设备(例如主机计算机的处理器),而不会在数据传输中引入任何明显的开销诱发的延迟。这是通过采用纯粹基于硬件的逻辑并实质上最小化存储设备中所需的数据缓冲量来实现的。由于可以使用常规逻辑制造工艺(例如互补金属氧化物半导体(CMOS)工艺)经济地制造所需的缓冲存储器数量,因此可以将所得的块解码器集成到单个IC中。

著录项

  • 公开/公告号US06185640B2

    专利类型

  • 公开/公告日2001-02-06

    原文格式PDF

  • 申请/专利权人

    申请/专利号US09100828

  • 发明设计人 KEVIN ROSS;

    申请日1998-06-19

  • 分类号G06F130/00;

  • 国家 US

  • 入库时间 2022-08-22 01:07:25

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