DMA with dynamically assigned channels, flexible block boundary notification and recording, type code checking and updating, commands, and status reporting

摘要

An improved DMA controller is provided. The improved DMA controller uses a peripheral control bus which has scan codes to indicate the DMA channel, conventional data request/data acknowledge lines, and additional lines indicating a "terminate," "type fetch," "end of buffer" and "store status." List entries are associated with the buffers in the memory. Each list entry has a type/status field which can be coded with information indicating "ready buffer," whether to notify "end of buffer," "buffer in progress," "completed buffer without status, " "completed buffer with status," "ready buffer with command," and "ready buffer without command." The type of status byte can be checked before processing the buffers.