State calculation circuit for discrete linear state space model

摘要

A circuit is designed to receive a plurality of index signals (320, 321). The circuit includes a memory circuit arranged to store a plurality of state vectors (400-403). A multiplex circuit (406) is coupled to the memory circuit. The multiplex circuit selectively produces one of the state vectors (408) in response to at least one of the index signals (320). A matrix generator circuit (410) is arranged to produce a variable matrix in response to at least another of the index signals (321). A logic circuit (600-602) is coupled to the multiplex circuit and the matrix generator circuit. The logic circuit is arranged to produce a logical combination (412) of the variable matrix and said one of the state vectors.