首页> 外国专利> Minimizing cache overhead by storing data for communications between a peripheral device and a host system into separate locations in memory

Minimizing cache overhead by storing data for communications between a peripheral device and a host system into separate locations in memory

机译:通过将用于外围设备和主机系统之间的通信的数据存储到内存中的单独位置来最大程度地减少缓存开销

摘要

A method and apparatus for storing, in a data storage device, status data and control data used for communications between a peripheral device and a host system with a mechanism for minimizing cache data processing overhead. The data storage device of the present invention includes a status portion, at a first location within the data storage device, for storing status data corresponding to a buffer. The first location of the data storage device corresponds to a first cache line, and the peripheral device generates the status data for providing status information to the host system. The data storage device further includes a control portion, at a second location within the data storage device, for storing control data corresponding to the descriptor. The second location of the data storage device corresponds to a second cache line, and the host system generates the control data for providing control information to the peripheral device. The host system reads the status information from cache and a cache controller transfers the status data from the data storage device to the cache for reading of the status data by the host system from the cache. With the present invention, the first cache line is different from the second cache line such that cache data processing overhead is minimized when coordinating access to the control data and the status data by the peripheral device and by the host system.
机译:一种用于将状态数据和控制数据存储在数据存储设备中的方法和装置,该状态数据和控制数据用于外围设备与主机系统之间的通信,其机制用于使高速缓存数据处理开销最小化。本发明的数据存储设备在数据存储设备内的第一位置处包括状态部分,用于存储与缓冲器相对应的状态数据。数据存储设备的第一位置对应于第一高速缓存行,并且外围设备生成用于向主机系统提供状态信息的状态数据。数据存储设备还包括控制部分,该控制部分在数据存储设备内的第二位置,用于存储与描述符相对应的控制数据。数据存储设备的第二位置对应于第二高速缓存线,并且主机系统生成用于向外围设备提供控制信息的控制数据。主机系统从高速缓存中读取状态信息,并且高速缓存控制器将状态数据从数据存储设备传输到高速缓存,以供主机系统从高速缓存中读取状态数据。利用本发明,第一高速缓存行不同于第二高速缓存行,使得当协调外围设备和主机系统对控制数据和状态数据的访问时,高速缓存数据的处理开销被最小化。

著录项

  • 公开/公告号US6182164B1

    专利类型

  • 公开/公告日2001-01-30

    原文格式PDF

  • 申请/专利权人 ADVANCED MICRO DEVICES INC.;

    申请/专利号US19980204978

  • 发明设计人 WILLIAMS ROBERT A.;

    申请日1998-12-03

  • 分类号G06F13/10;G06F13/14;G06F13/20;

  • 国家 US

  • 入库时间 2022-08-22 01:05:25

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