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Adapter for interconnecting single-ended and differential SCSI buses to prevent amp;ldquo;busyamp;rdquo; wired-or glitches from being passed from one bus to the other
Adapter for interconnecting single-ended and differential SCSI buses to prevent amp;ldquo;busyamp;rdquo; wired-or glitches from being passed from one bus to the other
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机译:用于将单端和差分SCSI总线互连以防止“忙”的适配器。从一个总线传递到另一总线的有线或小故障
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摘要
A SCSI adapter for interconnecting first and second SCSI buses includes a filter for preventing BUSY glitches from being passed from one bus to the other. The filter includes a shift register connected to NAND logic. The SCSI adapter also has a circuit for establishing a desired timing relationship between DATA signals received over the first bus and corresponding ACK or REQ signals also received over that bus that indicate whether the DATA signals are valid. The circuit includes a DATA latch responsive to a delayed version of the ACK or REQ signal received at a clock input thereof. The output of the latch and the corresponding delayed ACK or REQ are transmitted over the second bus.
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