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Fabrication method to approach the conducting structure of a DRAM cell with straightforward bit line

机译:利用简单的位线接近DRAM单元的导电结构的制造方法

摘要

A conducting structure of a COB cell of DRAM includes an piecewise straight active area and substantially straight bitline formed over a semiconductor substrate upon which a first dielectric layer existed. Contact holes are formed over the piecewise straight active area for electrically exposing both nodes (source and drain), of the active area of the access device. An offset landing plug pattern is defined by a photoresist-clear pattern beside, say, the source node of the primary contact pattern and recess-etched into the first dielectric layer and electrically connected to the source node of the primary contact structure finally. The contact structure is then formed by a deposition-etched process, which performs as a landing plug for contact of the upper contact structures. The top area of the landing plug is defined through the additive pattern of the primary contact as well as the offset landing plug pattern. Thereafter, a second dielectric layer is deposited on the first dielectric layer and the contact structure. A bit line contact is then formed in the second dielectric layer and defined at the offset position of the source node of the landing plug contact structure and electrically connected with it, so as to provide a capability of forming a substantially straight bit line lies on an off-axis site to the piecewise straight active area and the primary substrate contact plug.
机译:DRAM的COB单元的导电结构包括分段的直的有源区域和形成在其上存在第一介电层的半导体衬底上方的基本上直的位线。接触孔形成在分段的笔直有源区域上,用于电暴露访问设备有源区域的两个节点(源极和漏极)。偏移的着陆栓图案由例如主接触图案的源节点旁边的光致抗蚀剂清除图案限定,并且凹入蚀刻到第一介电层中并且最终电连接至主接触结构的源节点。然后,通过沉积-蚀刻工艺形成接触结构,该沉积-蚀刻工艺用作用于上接触结构的接触的平台插塞。接地插头的顶部区域是通过主触点的附加图案以及偏置的接地插头图案定义的。之后,在第一介电层和接触结构上沉积第二介电层。然后,在第二介电层中形成位线接触,并在连接插塞接触结构的源节点的偏移位置处定义位线接触,并与其电连接,以提供形成基本笔直的位线的能力。离轴位置到分段笔直有效区域和主要基板接触塞。

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