A method for implementing embedded flash is disclosed. The embedded flash, which comprises memory cells and logic peripherals, is formed on a substrate where a gate oxide layer, a tunneling oxide layer and a floating gate are performed. The spirit of the invention is that transistors of the cell region and transistors of the peripheral region are implemented separated. In the proposed method, after transistors of the peripheral region are totally formed, then formation of transistors of the cell region begins to perform. Therefore, not only material of spacers of transistors of peripheral region, but also silicides can only be formed on the peripheral region and on the gate transistors of the cell region. Beside, ARC layer are fabricated on the embedded flash before spacers of transistors of cell region are fabricated. Thus, for memory cells, issues of both junction breakdown voltage and junction leakage also is not degraded by silicides. In comparison, for logic peripherals, performances are enhanced by spacers of transistors are formed by nitride and proper silicides.
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