首页> 外国专利> EAST EVALUATION/INSPECTION SYSTEM OF HIGH SPEED BUS AND EASY EVALUATION/INSPECTION METHOD OF HIGH SPEED BUS

EAST EVALUATION/INSPECTION SYSTEM OF HIGH SPEED BUS AND EASY EVALUATION/INSPECTION METHOD OF HIGH SPEED BUS

机译:高速客车东部评价/检查系统及简易客车评价/检查方法

摘要

PROBLEM TO BE SOLVED: To provide an evaluation/inspection system of a high speed bus capable of performing a test by the worst pattern in consideration of the maximum transfer load and crosstalk by a single device for the high speed bus in the device without requiring an external device.;SOLUTION: An exclusive OR circuit 22 takes an exclusive OR of an initial value and an inversion bit select signal both from a table 21, output from a latch circuit 24. A check bit adding circuit 23 adds a check bit to data from the exclusive OR circuit 22, the latch circuit 24 latches data from the check bit adding circuit 23 and transfers it to a module B3 via the high speed bus 10. A check bit inspection circuit 31 of the module B3 performs error check based on the check bit of the transferred data and transmits its check result to a CPU 1 as error notification/detailed information.;COPYRIGHT: (C)2002,JPO
机译:要解决的问题:提供一种高速总线的评估/检查系统,该系统可以考虑最坏模式进行测试,而考虑到单个高速设备中最大的传输负载和串扰,而无需考虑设备中的高速总线解决方案:异或电路22从表21中获取从锁存电路24输出的初始值与反相位选择信号的异或。校验位加法电路23将校验位加到数据上。锁存电路24从异或电路22锁存来自校验位加法电路23的数据,并通过高速总线10将其传送到模块B3。模块B3的校验位检查电路31根据该数据进行错误校验。传输数据的校验位,并将其校验结果作为错误通知/详细信息发送到CPU1。版权所有:(C)2002,JPO

著录项

  • 公开/公告号JP2002268958A

    专利类型

  • 公开/公告日2002-09-20

    原文格式PDF

  • 申请/专利权人 NEC CORP;

    申请/专利号JP20010071367

  • 发明设计人 TORII TAKASHI;

    申请日2001-03-14

  • 分类号G06F13/00;G06F11/22;

  • 国家 JP

  • 入库时间 2022-08-22 01:00:04

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