SYNCHRONOUS CIRCUIT DESIGNING METHOD, AND RECORDING MEDIUM RECORDED WITH SYNCHRONOUS CIRCUIT DESIGNING PROGRAM

摘要

PROBLEM TO BE SOLVED: To provide a synchronous circuit designing method capable of shortening designing time, and avoiding iteration by conducting layout of flip-flops and a clock tree with priority.;SOLUTION: This synchronous circuit designing method is provided with a step S101 to extract flip-flops, a step S102 to automatically layout the flip- flops, a step S103 to generate a clock tree of the flip-flops, a step S104 to detect clock delay time to the flip-flops, and a step S106 to conduct automatic layout wiring. By conducting layout of the clock tree with priority, designing time can be shortened, and iteration can be avoided.;COPYRIGHT: (C)2002,JPO