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METHOD OF DESIGNING LSI CIRCUIT USING HARD BLOCKS AND METHOD OF RESTORING CELL-PLACEMENT INFORMATION OF HARD BLOCKS FOR LSI

机译:使用硬块设计LSI电路的方法和恢复LSI硬块的单元放置信息的方法

摘要

PROBLEM TO BE SOLVED: To design an LSI circuit using hard blocks without increasing chip size.;SOLUTION: Hard-block cells 110 are used for the design by restoring cell- placement information inside a hard block, which is otherwise conventionally treated as a black box. Each transistor is recognized on a layout pattern of the hard block, and is collated with a transistor on a netlist in terms of coordinate values to recognize placement of each cell with each instance name. The power source lines and wiring originally contained in the hard block are not used. In designing a soft block 200, hard-block cells 110 are incorporated to design the total LSI circuit. By determining the placement of the soft-block cells 210 and the wiring for the hard-block cells 110 and for the soft-block cells 210 with an automatic placement and routing tool, it is possible to share the power-source lines 220 and to pass the chip wiring 300 within each block, and consequently it is possible to reduce the chip area.;COPYRIGHT: (C)2001,JPO
机译:解决的问题:在不增加芯片尺寸的情况下使用硬块设计LSI电路;解决方案:硬块单元110用于通过恢复硬块内部的单元放置信息进行设计,否则通常将其视为黑色框。在硬块的布局图案上识别每个晶体管,并根据坐标值与网表上的晶体管进行比较,以识别每个实例名称与每个单元的位置。不使用硬块中原来包含的电源线和接线。在设计软块200时,结合硬块单元110以设计整个LSI电路。通过使用自动布置和布线工具确定软块单元210的布置以及用于硬块单元110和软块单元210的布线,可以共享电源线220并共享电源线220。通过芯片配线300在每个块内,因此可以减小芯片面积。;版权所有:(C)2001,JPO

著录项

  • 公开/公告号JP2001358223A

    专利类型

  • 公开/公告日2001-12-26

    原文格式PDF

  • 申请/专利权人 DAINIPPON PRINTING CO LTD;

    申请/专利号JP20000181470

  • 发明设计人 HASHIMOTO SATORU;

    申请日2000-06-16

  • 分类号H01L21/82;G06F17/50;H01L27/04;H01L21/822;

  • 国家 JP

  • 入库时间 2022-08-22 00:53:44

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