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METHOD AND APPARATUS FOR CONVOLUTION ENCODING AND VITERBI DECODING OF DATA THAT UTILIZE A CONFIGURABLE PROCESSOR TO CONFIGURE A PLURALITY OF RE-CONFIGURABLE PROCESSING ELEMENTS
METHOD AND APPARATUS FOR CONVOLUTION ENCODING AND VITERBI DECODING OF DATA THAT UTILIZE A CONFIGURABLE PROCESSOR TO CONFIGURE A PLURALITY OF RE-CONFIGURABLE PROCESSING ELEMENTS
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机译:利用可配置处理器配置多个可重构处理元素的数据的卷积编码和维特比解码的方法和装置
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摘要
A method and apparatus for convolution encoding and Viterbi decoding utilizes a flexible, digital signal processing architecture that comprises a core processor and a plurality of re-configurable processing elements arranged in a two-dimensional array. The core processor is operable to configure the re-configurable processing elements to perform data encoding and data decoding functions. A received data input is encoded by configuring one of the re-configurable processing elements to emulate a convolution encoding algorithm and applying the received data input to the convolution encoding algorithm. A received encoded data input is decoded by configuring the plurality of re-configurable processing elements to emulate a Viterbi decoding algorithm wherein the plurality of re-configurable processing elements is configured to accommodate every data state of the convolution encoding algorithm. The core processor initializes the re-configurable processing elements by assigning register values to registers that define parameters such as constraint length and code rate for the convolution encoding algorithm.
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