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Performance verification/analysis tool for full-chip designs
Performance verification/analysis tool for full-chip designs
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机译:用于全芯片设计的性能验证/分析工具
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摘要
A method and apparatus may be provided for providing performance verification/analysis of a full-chip design. This may include performing an analysis on a first block of the full-chip design. Data (such as a waveform output from a pin of the block) may be captured while performing the analysis. This captured data may be utilized when performing an analysis of the full-chip design. Features of an interconnect between the first block and a second block may be determined using the captured data.
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