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Parallel concatenated trellis-coded modulation with asymmetric signal mapping
Parallel concatenated trellis-coded modulation with asymmetric signal mapping
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机译:具有非对称信号映射的并行级联网格编码调制
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摘要
Parallel concatenated trellis-coding modulation is accomplished by producing coded bits (21) from uncoded bits and also producing an interleaved version (22) of the coded bits from the uncoded bits. A first coded bits-to-signal mapping (mapping 1) is applied to the coded bits to produce a first output signal (S11), and a second coded bits-to-signal mapping (mapping 2) is applied to the interleaved version of the coded bits to produce a second output signal (S22), wherein the second coded bits-to-signal mapping differs from the first coded bits-to-signal mapping.
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