Frequenecy multiplier circuit and method using above circuit for a period time division in subperiods, for a brushless motor

摘要

The present invention relates a frequency multiplier circuit and a controlling method thereof, characterised in that it measures a period of a waveform by a fixed frequency timing signal, and that it reproduces said period by approaching a number of prefixed length subperiods as equal as possible to each other so to minimise the reproduction error thanks to the interpretation of said subperiod number in the following manner m=j * 2′.