Clock signal generation and buffer circuit having high noise immunity and low power consumption

摘要

A crystal oscillator circuit includes an oscillator gain stage, an intermediate amplifier, a high frequency noise filter, an output buffer and a power supply noise filter. The oscillator gain stage has a voltage reduction circuit for adjusting the voltage swing level of a generated clock signal. The generated clock signal is amplified by the intermediate amplifier and the high frequency noise filter filters the amplified signal. The power supply noise filter removes noise in the power supplied to the oscillator gain stage and the intermediate amplifier. The high frequency noise filter has two noise filtering circuits and a time-delay circuit. The time-delay circuit prevents two transistors in the output buffer from being turned on simultaneously to avoid large short circuit current and save power.