Queue based data control mechanism for queue based memory controller

摘要

A control queue for predicting, tracking and completing memory requests initiated by a memory controller in a computer memory. The control queue is loaded with the cycle by cycle control data necessary to complete the memory request. The control queue shifts its contents from one entry to the next on every clock cycle to the bottom entry of the queue. The control data from the bottom entry is used to generate signals and data to control the operation of the data path for the current clock cycle. The control queue also tracks and provides operational and timing dependency data to the memory controller so that operations can be initiated properly.