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Verification of design blocks and method of equivalence checking of multiple design views
Verification of design blocks and method of equivalence checking of multiple design views
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机译:设计模块的验证和多个设计视图的等效检查方法
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摘要
A method and system for comparing design block views comprising receiving a first design block view, receiving a second design block view, and comparing the first design block view with the second design block view to determine whether the first design block view is logically equivalent to the second design block view, the second design block view contains data representing self-timed circuits or a memory array.
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