首页> 外国专利> Sum-of-absolute-difference calculator for motion estimation using inversion and carry compensation with full and half-adders

Sum-of-absolute-difference calculator for motion estimation using inversion and carry compensation with full and half-adders

机译:绝对差之和计算器,用于使用求反和带全和半加法器的进位补偿进行运动估计

摘要

A specialized Sum-of-Absolute-Difference (SAD) calculator for motion estimation uses inversion rather than 2's complementing. The absolute-value operation of each pixel-pair difference is performed by a bit-wise inversion rather than a complement. This reduces delay since the adder/incrementer propagation is eliminated. The increment needed to adjust for inversion rather than 2's complementing is accomplished by using the carry inputs to the summing and final adders that generate the sum of the absolute differences. When 2-input final adders are used for summing, a total of k−1 adders are used to sum k absolute differences. One additional increment is needed since only k−1 adders are available. A reduced half-adder rather than a full adder is inserted between the summing and final adder for this remaining increment. Propagation of carries between bit positions in a full adder can be avoided using the half adder. The final adder generates the final sum (the SAD) by adding the sum and carry bits from the half-adder array and propagating the carries.
机译:专门用于运动估计的绝对差和(SAD)计算器使用反演而不是2的补码。每个像素对差的绝对值运算是通过按位求逆而不是补码来执行的。由于消除了加法器/增量器的传播,因此减少了延迟。通过使用求和和最终加法器的进位输入(产生绝对差之和)来实现为反转而不是2的补码进行调整所需的增量。当使用2输入最终加法器求和时,总共使用k减1加法器来求和k个绝对差。由于仅k&-1加法器可用,因此需要增加一个增量。对于该剩余增量,在求和与最终加法器之间插入一个减半的加法器而不是全加法器。使用半加法器可以避免在全加法器的位位置之间传播进位。最终加法器通过将和与半加法器阵列中的进位和相加并传播进位来生成最终总和(SAD)。

著录项

  • 公开/公告号US6473529B1

    专利类型

  • 公开/公告日2002-10-29

    原文格式PDF

  • 申请/专利权人 NEOMAGIC CORP.;

    申请/专利号US19990432367

  • 发明设计人 TAO LIN;

    申请日1999-11-03

  • 分类号G06K93/60;G06F75/20;

  • 国家 US

  • 入库时间 2022-08-22 00:47:45

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