Apparatus and method for correcting one-bit error of parallel digital bus

摘要

In a method and apparatus for modifying an error in the case of one-bit error in a parallel digital bus, the original data can be recovered when one of the data bits is fixed as ‘0’ or ‘1’ because of a hardware error, or when one of the data bits has a random value of ‘0’ or ‘1’. In case of no error, the present invention only endures such overhead as propagation delay, rarely causing a decrease in performance. If the present invention is chosen as a bus specification, such as PCI (in other words, if the present invention is utilized as a bus interface in the bus-using chips), the bus fault tolerance is improved.