首页> 外国专利> Capacitively-coupled extended swing zero-DC-power active termination with CMOS overshoot/undershoot clamps

Capacitively-coupled extended swing zero-DC-power active termination with CMOS overshoot/undershoot clamps

机译:电容耦合扩展摆幅零直流电源有源终端,带有CMOS过冲/下冲钳位

摘要

An active terminating circuit has buffers to produce wider voltage drives on clamping transistors. A transmission line drives coupling capacitors. One capacitor drives an upper node that drives the gate of an upper buffer transistor. The upper buffer transistor drives a p-gate node coupled to a gate of a p-channel clamping transistor. The other capacitor drives a lower node that drives the gate of a lower buffer transistor, which drives an n-gate node of an n-channel clamping transistor. The drains of the clamping transistors are connected to the transmission line. Resistors pull the lower node to the power-supply voltage and pull the upper node to ground when no transitions occur on the transmission line, achieving zero standby power. When a transition is detected, it is coupled through the capacitors and buffered to the p-gate and n-gate nodes. Limiting transistors limit upper and lower node swings.
机译:有源终端电路具有缓冲器,可在钳位晶体管上产生更宽的电压驱动。传输线驱动耦合电容器。一个电容器驱动一个上节点,该上节点驱动一个上缓冲晶体管的栅极。上缓冲晶体管驱动耦合到p沟道钳位晶体管的栅极的p栅极节点。另一个电容器驱动一个下部节点,该下部节点驱动一个下部缓冲晶体管的栅极,该下部缓冲晶体管驱动一个n沟道钳位晶体管的一个n栅极节点。钳位晶体管的漏极连接到传输线。当传输线上未发生过渡时,电阻器将下部节点拉到电源电压,并将上部节点拉到地,从而实现零待机功率。当检测到转换时,它通过电容器耦合并缓冲到p栅极和n栅极节点。限制晶体管限制上下节点的摆幅。

著录项

  • 公开/公告号US6429678B1

    专利类型

  • 公开/公告日2002-08-06

    原文格式PDF

  • 申请/专利权人 PERICOM SEMICONDUCTOR CORP.;

    申请/专利号US20010683127

  • 发明设计人 ANTHONY YAP WONG;KWONG SHING LIN;

    申请日2001-11-21

  • 分类号H03K171/60;

  • 国家 US

  • 入库时间 2022-08-22 00:46:50

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