首页> 外国专利> IMPROVED DECISION DIRECTED PHASE LOCKED LOOP (DD-PLL) FOR USE WITH SHORT BLOCK CODES IN DIGITAL COMMUNICATION SYSTEMS

IMPROVED DECISION DIRECTED PHASE LOCKED LOOP (DD-PLL) FOR USE WITH SHORT BLOCK CODES IN DIGITAL COMMUNICATION SYSTEMS

机译:数字通信系统中改进的决策级锁相环(DD-PLL),用于短块码

摘要

An improved digital decision directed phase locked loop (DD-PLL) for use withshortblock codes using phase shifting keying (PSK) modulation. The improvementinvolves aconventional digital phase lock loop which is modified to base its loopcorrections on the resultsobtained by decoding the short block code rather than on a symbol by symbolbasis as iscustomary in conventional DD-PLLs. The improved method of loop correctionsinvolvesretaining the symbol data pending the decoder's decision, derotating theretained data inaccordance with the decoded result, and integrating the derotated data to forma compositeestimator upon which to base the loop correction. In its preferred embodiment,the inventionuses an (8, 4) biorthogonal code with quatenary PSK.
机译:一种改进的数字决策定向锁相环(DD-PLL),可与短使用相移键控(PSK)调制的分组代码。改善涉及常规数字锁相环,已对其进行了修改以使其环路为基础结果更正通过解码短块代码而不是逐个符号地获得原样常规DD-PLL中常见。循环校正的改进方法涉及在解码器做出决定之前保留符号数据,从而使保留数据在根据解码结果,合并解旋后的数据,形成复合材料循环校正所基于的估计量。在其最佳实施例中,本发明使用带有八进制PSK的(8,4)双正交码。

著录项

  • 公开/公告号CA2298863C

    专利类型

  • 公开/公告日2002-09-17

    原文格式PDF

  • 申请/专利权人 TRW INC.;

    申请/专利号CA20002298863

  • 申请日2000-02-17

  • 分类号H03L7/085;H04B1/06;H04L27/22;

  • 国家 CA

  • 入库时间 2022-08-22 00:41:12

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