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Method and device for the digital control of a phase-locked loop and relative phase-locked loop thus obtained

机译:如此获得的用于锁相环和相对锁相环的数字控制的方法和装置

摘要

A method is described for the digital control of a phase-locked loop consisting in the separate estimation of both phase and frequency errors of the data source as compared with those of the local oscillator and in the separate and adaptive filtering of the two signals. The value of the VCO control voltage is calculated on the basis of the two filtered signals. The phase and frequency error estimation and the frequency and phase error filtering are carried out in such a way as to eliminate the time-varying random components (jitter and noise) without delaying the feedback signals, since the portion of the signals that varies with time because of the variation of the commands, is subtracted before estimations and filterings.
机译:描述了一种用于锁相环的数字控制的方法,该方法包括:与本地振荡器相比,分别估计数据源的相位和频率误差,并且分别对两个信号进行自适应滤波。 VCO控制电压的值是根据两个滤波后的信号计算得出的。相位和频率误差估计以及频率和相位误差滤波以消除时变随机分量(抖动和噪声)而不延迟反馈信号的方式进行,因为信号的一部分随时间变化由于命令的变化,在进行估计和滤波之前先将其减去。

著录项

  • 公开/公告号EP0926835A3

    专利类型

  • 公开/公告日2002-11-06

    原文格式PDF

  • 申请/专利权人 ALCATEL;

    申请/专利号EP19980440279

  • 申请日1998-12-04

  • 分类号H03L7/085;

  • 国家 EP

  • 入库时间 2022-08-22 00:35:39

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