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A PARALLEL PROCESSOR NETWORK, A PROCESSOR AND A METHOD FOR SOLVING DIFFERENTIAL EQUATIONS IN A PARALLEL PROCESSOR NETWORK

机译:并行处理器网络,并行处理器网络中的微分方程的求解方法

摘要

The present invention relates to a parallel processor network, a processor and a method for solving differential equations in a parallel processor network. A parallel processor network includes several processors (processing units) that are arranged in a regular form. A processing unit is coupled with selected processing units. A problem for integrating this kind of a parallel processor network into a chip is the minimization of the physical size and power consumption of the processor. In the parallel processor network of the invention, the couplings are realized with analog multipliers. The sum of analog couplings is converted to a digital quantity that is used to digitally integrate the state(s) of a processing unit. The state(s) are converted to an analog quantity that is used to control the analog multipliers. The invention allows the minimization of the power consumption and physical size of the paralles processor network.
机译:并行处理器网络,处理器和用于求解并行处理器网络中的微分方程的方法技术领域本发明涉及并行处理器网络,处理器和用于在并行处理器网络中求解微分方程的方法。并行处理器网络包括以规则形式排列的几个处理器(处理单元)。处理单元与选定的处理单元耦合。将这种并行处理器网络集成到芯片中的问题是处理器的物理尺寸和功耗的最小化。在本发明的并行处理器网络中,通过模拟乘法器来实现耦合。模拟耦合的总和被转换为用于对处理单元的状态进行数字积分的数字量。状态被转换为用于控制模拟乘法器的模拟量。本发明允许最小化并行处理器网络的功耗和物理尺寸。

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