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Flexible Memory Address Mapping Circuit for CPU Max Processing
Flexible Memory Address Mapping Circuit for CPU Max Processing
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机译:灵活的内存地址映射电路,用于CPU最大处理
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摘要
PURPOSE: A flexible memory address mapping circuit for CPU max processing is provided to make the CPU carry out the high performance process by configuring a main memory with DRAM(SRAM)+SRAM and to improve the entire processing gain of the CPU by floatingly changing a position according to a software request of the SRAM. CONSTITUTION: The circuit for mapping the memory address comprises the CPU(13) controlling the entire system and outputting an address signal and a control signal for decoding, an address decoder(40) converting the address and control signal output from the CPU into the decoding and control signal, and a PLD(Programmable Logic Device)(15) consisting of a module(20) capable of changing the memory position of the SRAM(19). The memories(18a,18b,19) receive the memory control signal output from the PLD and a buffer(17) transfers the address and the data by positioning between the CPU and the memories.
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