A LDD transistor fabrication method using disposable spacer and etchant without effecting on field oxide

摘要

PURPOSE: A fabrication method of an LDD(Lightly Doped Drain) transistor is provided to generate an LDD region without an influence to a field oxide and to reduce a mask processing by using a PE-SiON(Plasma Enhanced Silicon OxiNitride) and an NAE(New Anti-Reflection Layer Etchant) as an etching solution. CONSTITUTION: A fabrication method of an LDD transistor comprises a first step depositing a PE-SiON, a second step generating spacers(42) defining LDD regions by etching the PE-SiON, a third step performing an ion implantation for forming source/drain regions(40) after performing the second step, a fourth step completely etching the spacers(42) after performing the third step, and a fifth step performing another ion implantation for generating LDD regions. At this point, the two-step etch processes are performed with an NAE as an etching solution.