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- Semiconductor memory device having DLL capable of high frequency operating during burn-in test and method of the DLL

机译:-具有在老化测试过程中能够高频操作的DLL的半导体存储器件以及该DLL的方法

摘要

Burn-in method of operation of the test when the semiconductor memory device, and a synchronization circuit having a delay in the operation delay in the high-frequency synchronization circuit is disclosed. The invention burn-in mode operation the semiconductor memory device with a delay to the synchronization circuit is a circuit generating a control signal to the delayed synchronization circuit for generating control signals in response to a test mode signal, and responsive to said test mode signal to a high frequency clock signal and a response to the ring oscillator and the control signals and the clock signal for generating said time-delay synchronous circuit that operates in a mode or normal mode; And a fuse or a switch for transmitting the clock signal as in the delayed synchronization circuit, embodiment the semiconductor memory device according to the present invention, conventional time-due to the clock frequency could be sufficient to test for a test to delay synchronization circuit Unlike difficult is also verification, one-time of the operation of a delay synchronization circuit is to generate a clock signal of a high frequency supplied from the mode signal illustration part ohsil ring in response to it is possible to also test the operation with the into the original delay synchronization circuit .
机译:公开了当半导体存储器件时的测试的老化操作方法,以及在高频同步电路中具有延迟操作的延迟的同步电路。本发明的半导体模式的老化模式操作对同步电路有延迟,该电路是产生到延迟的同步电路的控制信号的电路,该延迟的同步电路用于响应于测试模式信号并响应于所述测试模式信号而产生控制信号。高频时钟信号和对环形振荡器的响应以及控制信号和时钟信号,用于产生以模式或正常模式工作的所述延时同步电路;以及如在延迟同步电路中那样的用于传输时钟信号的保险丝或开关,根据本发明的半导体存储装置的实施例,由于时钟频率的传统时间可能足以测试延迟同步电路的测试。困难的也是验证,延迟同步电路的操作的一次是响应于也可以测试从模式信号图示部分ohsil环提供的高频时钟信号,该时钟可以从模式信号图示部分ohsil环提供。原始延迟同步电路。

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