Heterostructure FET consists of a silicon/silicon-germanium heterostructure layer arrangement with a gate contact zone formed as a pn- or np-diode contact made of semiconductor material

摘要

Heterostructure FET consists of a silicon/silicon-germanium heterostructure layer arrangement with source, drain and gate contact zones formed on a silicon substrate (1). The gate contact zone is formed as a pn- or np-diode contact (6, 7) made of semiconductor material. Preferred Features: The heterostructure layer arrangement is a modulation-doped FET with at least one conducting channel which is p- or n-conducting. The heterostructure layer arrangement consists of a buffer layer (2) made of Si/Ge alloy, a first supply layer (3) made of an n-doped Si/Ge alloy with an undoped region, an undoped silicon conducting layer (4), a second supply layer (5) with an undoped and an n-doped Si/Ge alloy, an undoped or slightly doped first diode layer (6) made of silicon, and a p+-doped diode layer (7) made of silicon with source and drain contact metallizations.