Circuit for generating and amplifying limited amplitude d.c. signal with level essentially proportional to input signal logarithm has FM demodulator, squaring stage, current adding unit

摘要

The circuit has a frequency or FM demodulator unit (40) connected after the last of at least two amplifier stages (10,20,30) of an amplifier circuit. The demodulator unit is followed by a squaring stage (50,60,70) for squaring the output signal of the frequency demodulation unit, especially it's a.c. component, and the level voltage of the squaring stage's output signal is added to that of the amplifier stages by a current adding unit (80). Independent claims are also included for the following: an IC containing an inventive circuit and a method of generating and amplifying a direct voltage signal that is limited in amplitude with level essentially proportional to the logarithm of an input signal.