首页> 外国专利> Controlled pipeline logic has combined logic units processing input components, flip-flops connected to logic unit inputs/outputs, random signal generator, control bit, maintains data flow

Controlled pipeline logic has combined logic units processing input components, flip-flops connected to logic unit inputs/outputs, random signal generator, control bit, maintains data flow

机译:受控流水线逻辑具有处理输入组件的组合逻辑单元,连接到逻辑单元输入/输出的触发器,随机信号发生器,控制位,保持数据流

摘要

The device combines or overlaps commands; the flow path input is decided after each stage. It has combined logic units for processing input components, flip-flops connected to logic unit inputs and outputs, a random signal generator and a control bit. As soon as an input is no longer present the random signal generator is activated to continue the simulated signal; the control bit notified to accept simulated signals, thus maintaining data flow.
机译:设备组合或重叠命令;在每个阶段之后确定流路输入。它具有用于处理输入组件的组合逻辑单元,连接到逻辑单元输入和输出的触发器,随机信号发生器和控制位。一旦不再有输入,随机信号发生器就会被激活以继续模拟信号。通知控制位接受模拟信号,从而保持数据流。

著录项

  • 公开/公告号DE10115844A1

    专利类型

  • 公开/公告日2002-10-17

    原文格式PDF

  • 申请/专利权人 GENETICWARE CO. LTD.;

    申请/专利号DE2001115844

  • 发明设计人 HOU CHIEN-TZU;HSU HSIU-YING;

    申请日2001-03-30

  • 分类号H04L9/20;G06F12/14;

  • 国家 DE

  • 入库时间 2022-08-22 00:26:59

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