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Vco - circuit with a wide output frequency range and pll - circuit with the vco - circuit

机译:具有宽输出频率范围的VCO电路和具有VCO电路的PLL电路

摘要

A voltage-controlled oscillation circuit (10) according to the present invention has a driver - voltage generating circuit (11), which an initial tension (vos, science) corresponding to a control voltage (of), and a ring oscillator circuit (20), which for the operation of a supply of said bias voltage (vos, science) receives. The drivers - voltage generating circuit (11), the initial stress generates (vos, science) with the use of a feedback circuit, which consists of an operational amplifier (12) is formed for the operation of the supply of a power supply voltage (vdd) receives. Therefore, the influence of a said power supply voltage (vdd) that is acted upon by high frequency portion, that is to say a influence of a disturbance suppressed, as a result of which a stable generating an output clock (clko) is made possible with a small phase variation.
机译:根据本发明的压控振荡电路(10)具有驱动器-电压生成电路(11)和环形振荡器电路(20),该驱动器-电压生成电路(11)的初始张力(vos,science)对应于控制电压(of)。 ),用于为所述偏置电源(vos,science)供电。驱动器-电压产生电路(11)通过使用反馈电路产生初始应力(vos,science),该反馈电路由运算放大器(12)组成,用于操作电源电压( vdd)接收。因此,受到高频部分作用的所述电源电压(vdd)的影响,即干扰的影响被抑制,结果,可以稳定地产生输出时钟(clko)。相位变化很小。

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