首页>
外国专利>
method for hierarchical cache of configuration data of datenflussprozessoren and blocks with a two - or multidimensional programmable cell structure (fpgas, dpgas, o.dgl.)
method for hierarchical cache of configuration data of datenflussprozessoren and blocks with a two - or multidimensional programmable cell structure (fpgas, dpgas, o.dgl.)
The method involves one unit managing an associated number equal to some or all of a total number of configurable elements. Reconfiguration requests are sent from the elements to the unit. The unit accepts no further requests and changes during processing; loads yet to be loaded configuration data of earlier requests from an intermediate memory into the configurable element; and converts the current request to a definite identifier or ID. The ID is converted to the address in the unit's memory of the configuration data to be loaded if the data exists in the memory. The data are requested from a superior unit if not present in the unit's memory. The data are loaded if the element can accept them. Data which cannot be accepted are placed in temporary memory. When configuration data have been fully processed, new requests can be accepted, until when the configuration data yet to be loaded from earlier request are loaded into the configurable elements.
展开▼