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DIGITAL BICMOS NEW SPANISH INCREASED FOR USE IN A SECOND SPECIAL FIELD
DIGITAL BICMOS NEW SPANISH INCREASED FOR USE IN A SECOND SPECIAL FIELD
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机译:数字BICMOS新西班牙文增加了在第二个特殊领域中的使用
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摘要
A BiCMOS digital delay chain includes two signal paths coupled between an input terminal and an output terminal. The first signal path has two CMOS inverters coupled in series, while the second path has one CMOS inverter coupled to an BiNMOS inverter, with the latter being coupled to a BiCMOS pull-down circuit. By providing two signal paths between the input and output terminals of the delayed chain, a zero-static-power low-voltage circuit is obtained in which power-supply sensitivity is higher in one switching direction than in the other. This feature permits operation over a wide range of power supply potentials while minimizing changes in integrated circuit performance.
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