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Intermediate approach procedure for testing non-volatile multi-level storage cells and corresponding check-out switch
Intermediate approach procedure for testing non-volatile multi-level storage cells and corresponding check-out switch
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机译:测试非易失性多层存储单元的中间方法过程和相应的签出开关
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摘要
A successive approximation method for sensing multiple-level non-volatile memory cells which can take one of m=2n (n =2) different programming levels, provides for biasing a memory cell (MC) to be sensed in a predetermined condition, so that the memory cell (MC) sinks a cell current (IC) with a value belonging to a plurality of m distinct cell current values (IC0-IC3;IC0-IC15), and for : a) comparing the cell current (IC) with a reference current (IR) which has a value comprised between a minimum value and a maximum value of said plurality of m cell current values (IC0-IC3;IC0-IC15), thus dividing said plurality of cell current values (IC0-IC3;IC0-IC15) into two sub-pluralities of cell current values, and determining the sub-plurality of cell current values to which the cell current (IC) belongs; b) repeating the step a) until the sub-plurality of cell current values to which the cell current (IC) belongs comprises only one cell current value, which is the value for the current (IC) of the memory cell (MC) to be sensed. IMAGE
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