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Path test signal inspection circuit path and test signal generation circuit in a synchronous transmission equipment and digital transmission system

机译:同步传输设备和数字传输系统中的路径测试信号检查电路路径和测试信号生成电路

摘要

PROBLEM TO BE SOLVED: To perform a path test by effectively generating a path test signal. ;SOLUTION: An in-device frame counter 18 detects respective positions in an in-device frame according to an in-device clock and supplies results to respective circuits 14, 20, 22, 24, and 26. A test pattern generating circuit 20 generates a PN pattern continuously in a stoppable state, inserts a given logical value into a transmit frame at the positions of a section overhead and a path overhead, and continuously inserts the PN pattern over respective columns only at the position of a payload. A path overheat inserting circuit 22 rewrites the given logical value into the path overhead according to an AU pointer from an AU pointer processing circuit 14. Likewise, a multi-section terminating circuit 24 rewrites a multi-section overhead and a repeating section terminating circuit 26 rewrites a repeated-section overhead. Consequently, a synchronous transmission module STM-N which accommodates a path test signal having the PN pattern inserted into the payload continuously over respective columns is securely generated to perform the path test.;COPYRIGHT: (C)1998,JPO
机译:解决的问题:通过有效地生成路径测试信号来执行路径测试。 ;解决方案:设备内帧计数器18根据设备内时钟检测设备内帧中的各个位置,并将结果提供给各个电路14、20、22、24和26。测试模式生成电路20生成PN模式连续处于可停止状态,在段开销和路径开销的位置处将给定的逻辑值插入发送帧,并且仅在有效负载的位置处将PN模式连续地插入各个列。路径过热插入电路22根据来自AU指针处理电路14的AU指针,将给定的逻辑值重写为路径开销。同样,多段终端电路24重写多段开销,而重复段终端电路26重写重复节的开销。因此,可靠地产生了一种同步传输模块STM-N,该同步传输模块STM-N容纳了路径测试信号,该路径测试信号具有在各个列上连续地插入到有效载荷中的PN模式,以执行路径测试。

著录项

  • 公开/公告号JP3421208B2

    专利类型

  • 公开/公告日2003-06-30

    原文格式PDF

  • 申请/专利权人 沖電気工業株式会社;

    申请/专利号JP19960341298

  • 发明设计人 深澤 明彦;

    申请日1996-12-20

  • 分类号H04J3/14;H04J3/00;H04L29/14;

  • 国家 JP

  • 入库时间 2022-08-22 00:20:54

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