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FAILSAFE DETECTION SYSTEM AND METHOD FOR DIFFERENTIAL RECEIVER CIRCUITS

机译:差分接收电路的故障检测系统和方法

摘要

PROBLEM TO BE SOLVED: To provide an apparatus for providing failsafe detection for a differential receiver.;SOLUTION: Comparators 205, 210 are used to detect a differential voltage created by offset voltage resistor of a differential receiver device. The output of a NAND gate 220 is high when there is value data on the bus and low when a data signal is below a predetermined failsafe threshold. However, the output of the NAND gate 220 is delayed to an OR gate 240 by a predetermined period. A delay device 650 keeps a glitch or premature toggle from occurring when failsafe is detected. The delay caused by the delay device 650 should be longer than the substantial delay passing through an XOR gate 640 and an activity timer 230. If the delay device 650 were not present, the failsafe condition would be transmitted to the Failsafe bit before causing the glitch.;COPYRIGHT: (C)2003,JPO
机译:解决的问题:提供一种为差分接收器提供故障安全检测的设备。解决方案:比较器205、210用于检测由差分接收器设备的偏置电压电阻器产生的差分电压。当总线上有值数据时,“与非”门220的输出为高,而当数据信号低于预定的故障安全阈值时,其为低。然而,与非门220的输出被延迟到或门240预定的时间。当检测到故障安全时,延迟装置650防止小故障或过早的切换发生。延迟设备650引起的延迟应比通过异或门640和活动计时器230的实质延迟要长。如果不存在延迟设备650,则在引起故障之前,将故障安全条件传输到故障安全位。;版权:(C)2003,日本特许厅

著录项

  • 公开/公告号JP2003008418A

    专利类型

  • 公开/公告日2003-01-10

    原文格式PDF

  • 申请/专利权人 TEXAS INSTR INC TI;

    申请/专利号JP20020084841

  • 申请日2002-03-26

  • 分类号H03K19/007;H04L25/02;

  • 国家 JP

  • 入库时间 2022-08-22 00:12:17

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