Scanning an allowed value into a group of latches

摘要

During scan testing of logical and memory circuits, it is important to prevent a scan test error resulting from simultaneous switching of the values within chip logic. Scan testing, however, encompasses rapidly scanning in values into a register to detect if the register is properly functioning. A circuit is disclosed which looks at the n−1 values within the register and determines if the next scan in value would cause contention. If so, that value is blocked until the next scan in value would not cause contention with the n−1 values within the register. Practicably, the invention will allow only allowed values into the register and may allow a “hot one” value into the register every n−1 clock cycle. Feedback of the values in the register is provided to a logical AND function to determine if a differing bit value will be allowed to scan into the register.