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Booster circuit for raising voltage by sequentially transferring charges from input terminals of booster units to output terminals thereof in response to clock signals having different phases
Booster circuit for raising voltage by sequentially transferring charges from input terminals of booster units to output terminals thereof in response to clock signals having different phases
A booster circuit includes a plurality of booster units whose output terminals are respectively connected to the input terminals of the next-stage booster units, and an output circuit section. Each of the booster units sequentially transfers charges from the input terminal to the output terminal in response to clock signals to raise a positive or negative voltage input to a first-stage booster unit. Then, a node in which charges are left behind is reset by use of a reset signal after the charge transfer. The potential of the reset signal for turning ON the resetting transistor is created from the positive or negative boosted potential output from the output circuit section.
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