Logic dividing method, logic dividing system and recording medium for storing logic dividing program

摘要

Logic emulation according to the present invention is aimed at an object to provide a logic dividing and module wiring system for operating logic related to external interface signals and interface signals among circuits obtained as a result of division or a logic circuit at a high speed. In a logic emulation system, information on assignments of external interface signals of logic to connector pins is read in during division of the logic. Logic related to an external interface signal assigned to a connector pin is assigned to a field programmable gate array directly connected to the connector pin. In addition, delays are checked after the division of a logic circuit in order to determine the level of delay criticality of each interface signal between field programmable gate arrays. Wiring of a module is then carried out in accordance with the levels of criticality.