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Circuit configuration for discharging a capacitor which has been charged to a high voltage to a low voltage under the control of a control unit
Circuit configuration for discharging a capacitor which has been charged to a high voltage to a low voltage under the control of a control unit
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机译:用于在控制单元的控制下将已充电至高压的电容器放电至低压的电路结构
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摘要
The object is to discharge a first capacitor from a high voltage to a low voltage. To this end, the one electrode of the first capacitor is linked with the one electrode of a second capacitor via a FET path. The other two electrodes of the two capacitors are connected to reference potential. A voltage source with its internal resistance is connected in parallel to the second capacitor. A discharge path leads from the one electrode of the first capacitor from the paths of two FET and a protective resistor to the reference potential. A current path leads from the one electrode of the second capacitor to the reference potential via the paths of two additional FET. A control unit switches on the discharge path. Once the voltage of the first capacity has decreased to the required lower value, the discharge path is blocked while a holding path is opened.
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