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CMOS-interfaceable ECL integrated circuit with tri-state and adjustable amplitude outputs

机译:具有三态和可调幅度输出的CMOS接口ECL集成电路

摘要

An improved ECL circuit, based upon an ECL circuit of conventional design, functions as the required transceiver for the bi-directional data transmission between a computer and an electronic device with a specific interface of USB 2.0. The value of an emitter resistor within an emitter resistance network in the conventional ECL circuit is adjusted till its output voltage amplitude meets the USB 2.0 specification. A number of voltage level shifting and capacitive coupling circuits are added to both the input and output sections of the conventional ECL circuit making it directly interfaceable with the popular CMOS logic family. A collector electrode switch network is also added to the conventional ECL circuit to make its output terminals tri-statable thus compatible with the communication scheme of half duplexing under the USB 2.0 specification.
机译:基于传统设计的ECL电路的一种改进的ECL电路用作计算机和具有USB 2.0特定接口的电子设备之间双向数据传输所需的收发器。调整常规ECL电路中发射极电阻网络内的发射极电阻的值,直到其输出电压幅度满足USB 2.0规范为止。常规ECL电路的输入和输出部分都增加了许多电压电平转换和电容耦合电路,使其可直接与流行的CMOS逻辑系列接口。集电极开关网络也被添加到传统的ECL电路中,以使其输出端子处于三态,从而与USB 2.0规范下的半双工通信方案兼容。

著录项

  • 公开/公告号US6593774B2

    专利类型

  • 公开/公告日2003-07-15

    原文格式PDF

  • 申请/专利权人 HIGHPOINT TECHNOLOGIES INC.;

    申请/专利号US20010013284

  • 发明设计人 QI LI;

    申请日2001-12-07

  • 分类号H03K190/18;

  • 国家 US

  • 入库时间 2022-08-22 00:06:38

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