首页> 外国专利> Method, apparatus, and system for maintaining processor ordering by checking load addresses of unretired load instructions against snooping store addresses

Method, apparatus, and system for maintaining processor ordering by checking load addresses of unretired load instructions against snooping store addresses

机译:通过相对于窥探存储地址检查未退休的加载指令的加载地址来维护处理器顺序的方法,装置和系统

摘要

According to one aspect of the invention, a method is provided in which store addresses of store instructions dispatched during a last predetermined number of cycles are maintained in a first data structure of a first processor. It is determined whether a load address of a first load instruction matches one of the store addresses in the first data structure. The first load instruction is replayed if the load address of the first load instruction matches one of the store addresses in the first data structure.
机译:根据本发明的一个方面,提供了一种方法,其中在最后的预定数量的周期期间分派的存储指令的存储地址被保持在第一处理器的第一数据结构中。确定第一加载指令的加载地址是否与第一数据结构中的存储地址之一匹配。如果第一加载指令的加载地址与第一数据结构中的存储地址之一匹配,则重播第一加载指令。

著录项

  • 公开/公告号US6484254B1

    专利类型

  • 公开/公告日2002-11-19

    原文格式PDF

  • 申请/专利权人 INTEL CORPORATION;

    申请/专利号US19990475922

  • 发明设计人 DOUGLAS M. CARMEAN;MUNTAQUIM F. CHOWDHURY;

    申请日1999-12-30

  • 分类号G06F93/80;

  • 国家 US

  • 入库时间 2022-08-22 00:06:19

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