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System for increasing the bandwidth of sample-and-hold circuits in flash ADCs

机译:用于增加闪存ADC中采样保持电路带宽的系统

摘要

An analog-to-digital converter to convert an analog signal to a digital signal, including a sample-and-hold circuit to sample and hold the analog signal and to output a held signal, a buffer circuit to buffer the held signal to output a buffered signal, and a comparator circuit to compare the buffered signal with a reference voltage.
机译:一种模数转换器,用于将模拟信号转换为数字信号,包括采样保持电路以采样并保持模拟信号并输出​​保持信号;缓冲电路,用于缓冲保持信号以输出信号。缓冲信号,以及比较器电路,用于将缓冲信号与参考电压进行比较。

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